Jagannadham V V

Mr. Jagannadham V V has a Master of Science in Physics (Specialization in Electronics) and Masters (M. Tech.) specialization in Nano-Electronics. He worked at Wool Worth (I) Ltd. as Shift-Engineer before joining Flosolver Unit, National Aerospace Laboratories. At Flosolver Unit, he worked on design & development of custom data communication hardware system and custom-designed protocols, customized for Flosolver series of parallel computers (Flosolver Mk6, Flosolver Mk7 and Flosolver Mk8) and worked on integration & testing and bring-up of all these parallel computers. He is currently working at the Aerospace Electronics and Systems Division (ALD). Presently he is working on Verification and Validation process of DO-254 certification of FPGA based ARINC 818 IP core and glass cockpit configuration of HANSA NG trainer aircraft. His main interests are in design & development of High-speed FPGA based hardware designs, customized data communication system for parallel computing, certification of FPGA IP cores. He has been awarded the NAL Foundation Day Award - Excellence in Design, Development and project execution for Enhanced version of FloSwitch for parallel computing having innovative communication technology in June 2008.